diff --git a/arch/arc/lib/cache.c b/arch/arc/lib/cache.c
index efba789..354dbc6 100644
--- a/arch/arc/lib/cache.c
+++ b/arch/arc/lib/cache.c
@@ -117,7 +117,6 @@
 
 #define CACHE_LINE_MASK		(~(l1_line_sz - 1))
 
-#ifdef CONFIG_ISA_ARCV2
 int slc_line_sz __section(".data");
 bool slc_exists __section(".data") = false;
 bool ioc_exists __section(".data") = false;
@@ -175,6 +174,8 @@
 
 static void __slc_rgn_op(unsigned long paddr, unsigned long sz, const int op)
 {
+#ifdef CONFIG_ISA_ARCV2
+
 	unsigned int ctrl;
 	unsigned long end;
 
@@ -218,6 +219,8 @@
 	read_aux_reg(ARC_AUX_SLC_CTRL);
 
 	while (read_aux_reg(ARC_AUX_SLC_CTRL) & SLC_CTRL_BUSY);
+
+#endif /* CONFIG_ISA_ARCV2 */
 }
 
 static void arc_ioc_setup(void)
@@ -247,11 +250,11 @@
 	write_aux_reg(ARC_AUX_IO_COH_PARTIAL, 1);
 	write_aux_reg(ARC_AUX_IO_COH_ENABLE, 1);
 }
-#endif /* CONFIG_ISA_ARCV2 */
 
-#ifdef CONFIG_ISA_ARCV2
 static void read_decode_cache_bcr_arcv2(void)
 {
+#ifdef CONFIG_ISA_ARCV2
+
 	union bcr_slc_cfg slc_cfg;
 	union bcr_clust_cfg cbcr;
 	union bcr_generic sbcr;
@@ -266,8 +269,9 @@
 	cbcr.word = read_aux_reg(ARC_BCR_CLUSTER);
 	if (cbcr.fields.c && ioc_enable)
 		ioc_exists = true;
+
+#endif /* CONFIG_ISA_ARCV2 */
 }
-#endif
 
 void read_decode_cache_bcr(void)
 {
@@ -298,10 +302,10 @@
 {
 	read_decode_cache_bcr();
 
-#ifdef CONFIG_ISA_ARCV2
-	read_decode_cache_bcr_arcv2();
+	if (is_isa_arcv2())
+		read_decode_cache_bcr_arcv2();
 
-	if (ioc_exists)
+	if (is_isa_arcv2() && ioc_exists)
 		arc_ioc_setup();
 
 	read_decode_mmu_bcr();
@@ -311,9 +315,8 @@
 	 * only if PAE exists in current HW. So we had to check pae_exist
 	 * before using them.
 	 */
-	if (slc_exists && pae_exists)
+	if (is_isa_arcv2() && slc_exists && pae_exists)
 		slc_upper_region_init();
-#endif /* CONFIG_ISA_ARCV2 */
 }
 
 int icache_status(void)
@@ -363,10 +366,8 @@
 {
 	__ic_entire_invalidate();
 
-#ifdef CONFIG_ISA_ARCV2
-	if (slc_exists)
+	if (is_isa_arcv2() && slc_exists)
 		__slc_entire_op(OP_INV);
-#endif
 }
 
 int dcache_status(void)
@@ -478,15 +479,16 @@
 	if (start >= end)
 		return;
 
-#ifdef CONFIG_ISA_ARCV2
-	if (!ioc_exists)
-#endif
+	/*
+	 * ARCv1                  -> call __dc_line_op
+	 * ARCv2 && no IOC        -> call __dc_line_op; call __slc_rgn_op
+	 * ARCv2 && IOC enabled   -> nothing
+	 */
+	if (!is_isa_arcv2() || !ioc_exists)
 		__dc_line_op(start, end - start, OP_INV);
 
-#ifdef CONFIG_ISA_ARCV2
-	if (slc_exists && !ioc_exists)
+	if (is_isa_arcv2() && slc_exists && !ioc_exists)
 		__slc_rgn_op(start, end - start, OP_INV);
-#endif
 }
 
 void flush_dcache_range(unsigned long start, unsigned long end)
@@ -494,15 +496,16 @@
 	if (start >= end)
 		return;
 
-#ifdef CONFIG_ISA_ARCV2
-	if (!ioc_exists)
-#endif
+	/*
+	 * ARCv1                  -> call __dc_line_op
+	 * ARCv2 && no IOC        -> call __dc_line_op; call __slc_rgn_op
+	 * ARCv2 && IOC enabled   -> nothing
+	 */
+	if (!is_isa_arcv2() || !ioc_exists)
 		__dc_line_op(start, end - start, OP_FLUSH);
 
-#ifdef CONFIG_ISA_ARCV2
-	if (slc_exists && !ioc_exists)
+	if (is_isa_arcv2() && slc_exists && !ioc_exists)
 		__slc_rgn_op(start, end - start, OP_FLUSH);
-#endif
 }
 
 void flush_cache(unsigned long start, unsigned long size)
@@ -520,18 +523,14 @@
 {
 	__dc_entire_op(OP_FLUSH_N_INV);
 
-#ifdef CONFIG_ISA_ARCV2
-	if (slc_exists)
+	if (is_isa_arcv2() && slc_exists)
 		__slc_entire_op(OP_FLUSH_N_INV);
-#endif
 }
 
 void flush_dcache_all(void)
 {
 	__dc_entire_op(OP_FLUSH);
 
-#ifdef CONFIG_ISA_ARCV2
-	if (slc_exists)
+	if (is_isa_arcv2() && slc_exists)
 		__slc_entire_op(OP_FLUSH);
-#endif
 }